1. Field of the Invention
The present invention relates to a signal processing apparatus and a signal processing system, and more particularly, to a signal processing apparatus comprising upper, intermediate and lower processing layer processing sections, and a signal processing system for use in a packet communication system comprising two signal processing apparatuses connected with each other via a bus.
2. Description of the Related Art
In recent years, networking of computers has been rapidly advanced, and further, various kinds of computer peripheral units becomes commercially available. Accompanying with this, the connection states among computers and among a computer and various kinds of peripheral units become complicated. Also, the peripheral units become multifunctional, communication amounts between communication terminals increase, and a higher-speed more-convenient communication standard is therefore required.
In such circumstances, some interface standards of the next generation have been already proposed. Among them, the IEEE 1394 interface has been proposed as an interface for transferring data at a high speed among home digital devices and computers, and peripheral units. This interface standard has been proposed by the IEEE (The Institute of Electrical and Electronics Engineers, Inc.), and was specified as an IEEE std. 1394xe2x80x941995 IEEE Standard for a high performance serial bus. It is a very convenient serial interface standard which is considered to be used at home because of supporting a synchronous transfer, active plug and play, and a connection state of a high degree of freedom while maintaining a high transfer speed of hundreds Mbits per second.
Further, an SBP-2 (Serial Bus Protocol 2) is as one of application protocols using the IEEE 1394 packet communication system. The SBP-2 has functions of efficiently transferring commands and data among various kinds of units or devices such as a disk drive unit, a magnetic tape drive unit, a printer, a scanner, a digital camera or the like, and notifying an operation state of the command, the results of the operation, or a state whether or not data transfer has been completed, to an application layer processing section which is located so as to be higher than a SBP-2 layer processing section.
FIG. 7 is a timing chart showing a sequence of communication in a first example of prior art which is performed between signal processing apparatuses 1a and 2a of packet communication apparatuses connected to each other via a serial data bus conformed with the IEEE 1394 interface standard.
Referring to FIG. 7, in the first example, the signal processing apparatus 1a comprises an upper layer processing section 11a having a data memory 112a, an intermediate layer processing section 12a having a data memory 121a, and a lower layer processing section 13a having a data memory 131a. On the other hand, the signal processing apparatus 2a comprises an upper layer processing section 21a having a data memory 212a, an intermediate layer processing section 22a having a data memory 221a, and a lower layer processing section 23a having a data memory 231a. 
In the first example, when packet data 511 is transmitted from the signal processing apparatus 2a to the signal processing apparatus 1a, first of all, a data transmission request signal 510 is sent from the upper layer processing section 11a to the intermediate layer processing section 12a of the signal processing apparatus 1a. Transfer data 511 constructing a part of data 509 is also transmitted together with the data transmission request signal 510. In this case, the transfer data 511 is a piece of data obtained by dividing the data 509 by the upper layer processing section 11a into packet data each having the size equal to or smaller than a memory capacity of the data memory 131a of the lower layer processing section 13a because of limitation of the memory capacity of the data memory 131a. The transfer data 511 transmitted together with the data transmission request signal 510 is temporarily stored in the data memory 121a of the intermediate layer processing section 12a. The intermediate layer processing section 12a generates and outputs a Read/Write Request signal 513 to the lower layer processing section 13a, and transmits the transfer data 512 stored in the data memory 121a to the lower layer processing section 13a. 
The Read/Write Request signal 513 represents transfer request which is issued by the intermediate layer processing section 12a for transferring the transfer data 512 stored in the data memory 121a of the intermediate layer processing section 12a to the intermediate layer processing section 22a of the signal processing apparatus 2a, and the Read/Write Request signal 513 is a part of control signals or means for controlling the configuration order of the transfer data, confirmation of arrival of the transfer data to the signal processing apparatus 2a of the other party, retransmission control and the like. These control signals include an Indication signal (Notification of Transfer), a Response signal (Notification of Response), and a Confirmation signal (Notification of Confirmation), which will be described hereinafter.
In response to the Read/Write Request signal 513, the lower layer processing section 13a transmits transfer data 514 transmitted from the intermediate layer processing section 12a via the data memory 131a of the lower layer processing section 13a and the serial data bus to the lower layer processing section 23a of the signal processing apparatus 2a. 
The transfer data 514 is temporarily stored in the data memory 131a of the lower layer processing section 23a. Thereafter, the lower layer processing section 23a generates and outputs an Indication signal 516 to the intermediate layer processing section 22a of the signal processing apparatus 2a, and then, transmits the transfer data 515 stored in the data memory 231a to the intermediate layer processing section 22a. The intermediate layer processing section 22a temporarily stores the transfer data 517 received together with the Indication signal 516 into the data memory 221a of the intermediate layer processing section 22a. Then the intermediate layer processing section 22a generates and outputs a Response signal 518 to the lower layer processing section 23a, and further generates and outputs a Notification of Arrival signal 519 for the transfer data 517 to the upper layer processing section 21a of the signal processing apparatus 2a. 
The checked result of the matching of the transfer data 517 transmitted by the intermediate layer processing section 22a is included in the above Response signal 518. If there is no problem with respect to the transfer data 517, a code indicative of Completion is included in the Response signal 518. On the other hand, if there is a problem, a code indicative of an Error is included in the Response signal 518. In response to the Notification of Arrival signal 519, the upper layer processing section 21a receives the transfer data 517 stored in the data memory 221a of the intermediate layer processing section 22a. 
The Response signal 518 issued by the intermediate layer processing section 22a to the lower layer processing section 23a is received by the lower layer processing section 13a of the signal processing apparatus 1a. The above Response signal 518 is further transmitted as a Confirmation signal 520 from the lower layer processing section 13a to the intermediate layer processing section 12a. If the code of the Confirmation signal 520 is xe2x80x9cErrorxe2x80x9d, the transfer data 512 is retransmitted by the intermediate layer processing section 12a. On the other hand, if the code of the Confirmation signal 520 is xe2x80x9cCompletexe2x80x9d, a Notification of Completion signal 521, indicating that the transmission of the transfer data 511 to the signal processing apparatus 2a has been completed, is transmitted from the intermediate layer processing section 12a to the upper layer processing section 11a. In response to the Notification of Completion signal 521, the upper layer processing section 11a sends a data transmission request signal of new transfer data 522 to the intermediate layer processing section 12a. 
By repeating the above-mentioned process, the transmission of the data 509 from the signal processing apparatus 1a to the signal processing apparatus 2a is completed.
As an application technique of the first example of the prior art, there is a technique of continuously transmitting a plurality of transfer data without waiting for a Response signal to the transfer data from the destination apparatus of transmission after transmitting the transfer data via the intermediate layer processing section of the signal processing apparatus on data transmission side to the lower layer processing section. This application technique is referred as a second example of prior art.
FIG. 8 is a timing chart showing a sequence of communication in the second example of the prior art which is performed between signal processing apparatuses 1b and 2b. 
Referring to FIG. 8, in the second example, the signal processing apparatus 1b comprises an upper layer processing section 11b, an intermediate layer processing section 12b, and a lower layer processing section 13b. On the other hand, the signal processing apparatus 2b comprises an upper layer processing section 21b, an intermediate layer processing section 22b, and a lower layer processing section 23b. 
As shown in FIG. 8, in a manner similar to that of the first example of the prior art, transfer data 601 is transmitted from the upper layer processing section 11b via the intermediate layer processing section 12b to the lower layer processing section 13b of the signal processing apparatus 1b. At that time, in the intermediate layer processing section 12b, without waiting for reception of any Response signal 603 from the signal processing apparatus 2b for the transfer data 601 transmitted to the lower layer processing section 13b, transfer data 602 which has not been transmitted yet is transmitted to the lower layer processing section 13b. In the event of receiving the Response signal 603, the code of the received data is checked in a manner similar to that of the first example of the prior art. If the code of the received data is xe2x80x9cErrorxe2x80x9d, the transfer data 602 is retransmitted. On the other hand, if the code of the received data is xe2x80x9cCompletexe2x80x9d, a Notification of Completion signal indicative of completion of transmission is sent from the intermediate layer processing section 12b to the upper layer processing section 11b. In response to the Notification of Completion signal, the upper layer processing section 11b sends a data transmission request signal for new transfer data to the intermediate layer processing section 12b. 
In the first example of the prior art, by certainly handshaking between respective layer processing sections using the above-mentioned sequence of communication, it can be confirmed whether or not the data has been transferred without any problem. Further, since there are provided control signals or means for retransmitting data even in the case where a failure occurs and the data has not arrived at the signal processing apparatus of the destination, there is such an advantageous effect that data can be certainly transmitted.
In the second example of the prior art, since the intermediate layer processing section 12b of the signal processing apparatus 1b of the transfer data transmission side transmits untransmitted transfer data without waiting for any Response signal from the signal processing apparatus 2b of the destination of transmission, it is not necessary to provide no waiting time from the transmission of the transfer data until arrival of the Response signal to the transfer data from the signal processing apparatus 1b of the destination of transmission. As a result, high-speed data communication can be performed. The handshaking between respective layer processing sections is certainly carried out, and the reliability of data transmission is assured.
In the first conventional example, however, each time the upper layer processing section 11a confirms the Response signal to all the transfer data transmitted by the upper layer processing section 11a, the next transfer data is transmitted from the upper layer processing section 11a. Consequently, the number of handshaking between the upper layer processing section 11a and the intermediate layer processing section 12a remarkably increases, and this leads to disturbance of high-speed data communication between the signal processing apparatuses 1a and 2a. 
In the second example of the prior art, the next transfer data is transmitted before receiving the Response signal from the signal processing apparatus 2b of the reception side. Consequently, when a failure occurs in the transfer data and the signal processing apparatus 2b of the reception side sends a Response signal of xe2x80x9cErrorxe2x80x9d for the transfer data or returns no Response signal, upon retransmitting the transfer data in which a failure occurs from the signal processing apparatus 1b of the transmission side, it is necessary to provide an error control process of a large amount of calculation in order to correctly arrange the order of a plurality of transfer data in the signal processing apparatus 1b. The error control process makes the load on the application heavy, and this leads to interference for high-speed data communication.
An essential object of the present invention is therefore to provide a signal processing apparatus and a signal processing system, capable of performing data communication at higher speed by simplifying handshaking and the error control process without departing from the conventional control signals or means, namely, by using these control signals.
In order to achieve the aforementioned objective, according to one aspect of the present invention, there is provided a signal processing apparatus comprising an upper layer processing section, an intermediate layer processing section, and a lower layer processing section, the signal processing apparatus transmitting transfer data from the upper layer processing section via the intermediate layer processing section to the lower layer processing section, thereafter, transmitting the transfer data from the lower layer processing section to a destination apparatus via a bus, receiving a response signal sent from the destination apparatus in response to the transfer data at the lower layer processing section, and transmitting the received response signal via the intermediate layer processing section to the upper layer processing section,
wherein the lower layer processing section comprises a first storage unit having a first memory capacity of a predetermined limited size for transfer data, the first storage unit temporarily storing transfer data upon transmitting the transfer data via the bus,
wherein the intermediate layer processing section comprises a second storage unit having a second memory capacity larger than the limited size for transfer data, the second storage unit temporarily storing the transfer data upon receiving the transfer data from the upper layer processing section and transferring the received transfer data to the lower layer processing section,
wherein the upper layer processing section transmits the transfer data of a size, which is larger than the first memory capacity and which is equal to or smaller than the second memory capacity, to the intermediate layer processing section,
wherein the intermediate layer processing section receives the transfer data transmitted from the upper layer processing section, divides the transfer data into a plurality of divided data each having a size equal to or smaller than the limited size for transfer data, and transmits the divided data to the lower layer processing section, and
wherein when there is untransmitted divided data upon receiving the response signal from the lower layer processing section, the intermediate layer processing section transmits the untransmitted divided data to the lower layer processing section without transmitting any response signal to the upper layer processing section.
According to another aspect of the present invention, there is provided a signal processing apparatus comprising an upper layer processing section, an intermediate layer processing section, and a lower layer processing section, the signal processing apparatus transmitting transfer data received by the lower layer processing section from a source apparatus via a bus, to the upper layer processing section via the intermediate layer processing section, transmitting a response signal to the transfer data from the intermediate layer processing section to the lower layer processing section, thereafter, transmitting the response signal from the lower layer processing section to the source apparatus via the bus,
wherein the intermediate layer processing section comprises a storage unit having a predetermined memory capacity,
wherein the intermediate layer processing section receives a plurality of transfer data from the lower layer processing section so that the received transfer data is not larger than the memory capacity, stores the received plurality of transfer data into the storage unit, and
wherein in either one of the following cases:
(a) a first case where reception of the plurality of transfer data from the lower layer processing section is completed, and
(b) a second case where transmission of the transfer data from the source apparatus is completed,
the intermediate layer processing section transmits the plurality of transfer data stored in the storage unit to the upper layer processing section.
According to a further aspect of the present invention, there is provided a signal processing system for transmitting and receiving data between a first signal processing apparatus and a second signal processing apparatus via a bus,
wherein the first signal processing apparatus comprises a first upper layer processing section, a first intermediate layer processing section, and a first lower layer processing section, the first signal processing apparatus transmitting transfer data from the first upper layer processing section via the first intermediate layer processing section to the first lower layer processing section, thereafter, transmitting the transfer data from the first lower layer processing section to the second signal processing apparatus via a bus, receiving a response signal sent from the second signal processing apparatus in response to the transfer data at the first lower layer processing section, and transmitting the received response signal via the first intermediate layer processing section to the first upper layer processing section,
wherein the second signal processing apparatus comprises a second upper layer processing section, a second intermediate layer processing section, and a second lower layer processing section, the second signal processing apparatus transmitting transfer data received by the second lower layer processing section from the first signal processing apparatus via the bus, to the second upper layer processing section via the second intermediate layer processing section, transmitting a response signal to the transfer data from the second intermediate layer processing section to the second lower layer processing section, thereafter, transmitting the response signal from the second lower layer processing section to the first signal processing apparatus via the bus,
wherein the first lower layer processing section comprises a first storage unit having a first memory capacity of a predetermined limited size for transfer data, the first storage unit temporarily storing transfer data upon transmitting the transfer data via the bus,
wherein the first intermediate layer processing section comprises a second storage unit having a second memory capacity larger than the limited size for transfer data, the second storage unit temporarily storing the transfer data upon receiving the transfer data from the first upper layer processing section and transferring the received transfer data to the first lower layer processing section,
wherein the first upper layer processing section transmits the transfer data of a size, which is larger than the first memory capacity and which is equal to or smaller than the second memory capacity, to the first intermediate layer processing section,
wherein the first intermediate layer processing section receives the transfer data transmitted from the first upper layer processing section, divides the transfer data into a plurality of divided data each having a size equal to or smaller than the limited size for transfer data, and transmits the divided data to the first lower layer processing section,
wherein when there is untransmitted divided data upon receiving the response signal from the first lower layer processing section, the first intermediate layer processing section transmits the untransmitted divided data to the first lower layer processing section without transmitting any response signal to the first upper layer processing section,
wherein the second intermediate layer processing section comprises a third storage unit having a predetermined third memory capacity,
wherein the second intermediate layer processing section receives a plurality of transfer data from the second lower layer processing section so that the received transfer data is not larger than the third memory capacity, stores the received plurality of transfer data into the third storage unit, and
wherein in either one of the following cases:
(a) a first case where reception of the plurality of transfer data from the second lower layer processing section is completed, and
(b) a second case where transmission of the transfer data from the first signal processing apparatus is completed,
the second intermediate layer processing section transmits the plurality of transfer data stored in the third storage unit to the second upper layer processing section.
According to a still further aspect of the present invention, there is provided a signal processing apparatus comprising an upper layer processing section, an intermediate layer processing section, and a lower layer processing section, the signal processing apparatus transmitting transfer data from the upper layer processing section via the intermediate layer processing section to the lower layer processing section, thereafter, transmitting the transfer data from the lower layer processing section to a destination apparatus via a bus, receiving a response signal sent from the destination apparatus in response to the transfer data at the lower layer processing section, and transmitting the received response signal via the intermediate layer processing section to the upper layer processing section,
wherein the intermediate layer processing section divides the transfer data received from the upper layer processing section into a plurality of divided data, and transmits the plurality of divided data to the lower layer processing section in a continuous sequential form of set of predetermined plural number of divided data.
In the above-mentioned signal processing apparatus, when the response signal, which corresponds to the divided data and which is received from the destination apparatus via the lower layer processing section, indicates that the divided data is normally received by the destination apparatus, the intermediate processing section transmits untransmitted divided data to the lower layer processing section, and
wherein when the received response signal indicates that the divided data is not normally received by the destination apparatus, the intermediate processing section retransmits divided data which is not normally received by the destination apparatus, to the lower layer processing section.
In the above-mentioned signal processing apparatus, in response to a response signal which corresponds to each of the divided data, which is received from the destination apparatus via the lower layer processing section, and indicates that the divided data is normally received by the destination apparatus, when the received response signal is a response signal corresponding to predetermined divided data, the intermediate layer processing section transmits untransmitted divided data to the lower layer processing section, and
wherein when the received response signal is different from a response signal corresponding to the oldest divided data among the divided data whose corresponding response signal is not received by the intermediate layer processing section, the intermediate layer processing section retransmits to the lower layer processing section the oldest divided data among the divided data whose corresponding response signal is not received by the intermediate layer processing section, and transmits untransmitted divided data to the lower layer processing section.
In the above-mentioned signal processing apparatus, in response to a response signal which corresponds to each of the divided data, which is received from the destination apparatus via the lower layer processing section, and indicates that the divided data is normally received by the destination apparatus, when the received response signal is a response signal corresponding to predetermined divided data, the intermediate layer processing section transmits untransmitted divided data to the lower layer processing section, and
wherein when any response signal corresponding to a transmitted divided data is not received by the intermediate layer processing section within a predetermined time interval from transmission of the divided data, the intermediate layer processing section retransmits to the lower layer processing section, the transmitted divided data whose corresponding response signal is not received by the intermediate layer processing section, and transmits untransmitted divided data to the lower layer processing section.
In the above-mentioned signal processing apparatus, in response to a response signal which corresponds to each of the divided data, which is received from the destination apparatus via the lower layer processing section, and indicates that the divided data is normally received by the destination apparatus, when the received response signal is a response signal corresponding to predetermined divided data, the intermediate layer processing section transmits untransmitted divided data to the lower layer processing section,
wherein when the received response signal is different from a response signal corresponding to the oldest divided data among the divided data whose corresponding response signal is not received by the intermediate layer processing section, the intermediate layer processing section retransmits to the lower layer processing section, the oldest divided data among the divided data whose corresponding response signal is not received by the intermediate layer processing section, and transmits untransmitted divided data to the lower layer processing section, and
wherein when any response signal corresponding to a transmitted divided data is not received by the intermediate layer processing section within a predetermined time interval from transmission of the divided data, the intermediate layer processing section retransmits to the lower layer processing section, the transmitted divided data whose corresponding response signal is not received by the intermediate layer processing section, and transmits untransmitted divided data to the lower layer processing section.
According to a still more further aspect of the present invention, there is provided a signal processing apparatus comprising an upper layer processing section, an intermediate layer processing section, and a lower layer processing section, the signal processing apparatus transmitting transfer data received by the lower layer processing section from a source apparatus via a bus, to the upper layer processing section via the intermediate layer processing section, transmitting a response signal to the transfer data from the intermediate layer processing section to the lower layer processing section, thereafter, transmitting the response signal from the lower layer processing section to the source apparatus via the bus, and
wherein in either one of the following cases:
(a) a first case where the transfer data from the lower layer processing section cannot be normally received by the intermediate layer processing section, and
(b) a second case where the transfer data from the lower layer processing section cannot be received at all by the intermediate layer processing section,
the intermediate layer processing section transmits a response signal for request for retransmission of the transfer data, and rearranges not only transfer data retransmitted from the source apparatus in response to the response signal for request, but also transfer data which has been already received in accordance with a predetermined rule.
According to a more still further aspect of the present invention, there is provided a signal processing system for transmitting and receiving data between a first signal processing apparatus and a second signal processing apparatus via a bus,
wherein the first signal processing apparatus comprises a first upper layer processing section, a first intermediate layer processing section, and a first lower layer processing section, the first signal processing apparatus transmitting transfer data from the first upper layer processing section via the first intermediate layer processing section to the first lower layer processing section, thereafter, transmitting the transfer data from the first lower layer processing section to the second signal processing apparatus via the bus, receiving a response signal sent from the second signal processing apparatus in response to the transfer data at the first lower layer processing section, and transmitting the received response signal via the first intermediate layer processing section to the first upper layer processing section,
wherein second signal processing apparatus comprises a second upper layer processing section, a second intermediate layer processing section, and a second lower layer processing section, the second signal processing apparatus transmitting transfer data received by the second lower layer processing section from the first signal processing apparatus via the bus, to the second upper layer processing section via the second intermediate layer processing section, transmitting a response signal to the transfer data from the second intermediate layer processing section to the second lower layer processing section, thereafter, transmitting the response signal from the second lower layer processing section to the first signal processing apparatus via the bus,
wherein the first intermediate layer processing section divides the transfer data received from the first upper layer processing section into a plurality of divided data, and transmits the plurality of divided data to the first lower layer processing section in a continuous sequential form of set of predetermined plural number of divided data, and
wherein in either one of the following cases:
(a) a first case where the transfer data from the second lower layer processing section cannot be normally received by the second intermediate layer processing section, and
(b) a second case where the transfer data from the second lower layer processing section cannot be received at all by the second intermediate layer processing section,
the second intermediate layer processing section transmits a response signal for request for retransmission of the transfer data, and rearranges not only transfer data retransmitted from the first signal processing apparatus in response to the response signal for request, but also transfer data which has been already received in accordance with a predetermined rule.
In the above-mentioned signal processing apparatus, the bus is preferably a wired circuit conformed with an IEEE 1394 interface standard, and a protocol conformed with SBP-2 (Serial Bus Protocol 2) described in the IEEE 1394 interface standard is preferably used as an application protocol used in the intermediate layer processing section.